The present invention is in the field of wireless communications systems including Code-Division Multiple Access (CDMA) systems and pertains more particularly to methods and apparatus for fast acquisition of an incoming signal in a Wireless Local Loop (WLL) telephony system.
Wireless communication of all sorts, at the time of this patent application, is a rapidly expanding technology. Wireless communication functional innovations, such as Time-Division-Multiple-Access (TDMA) systems and Frequency-Division-Multiple-Access (FDMA) systems for sharing communication bands are well known, and much developmental effort is being expended to provide improvements to such systems. One in which considerable development is being done is in the area of wireless local loop (WLL) telephony systems, designed to deliver reliable telephone service to areas lacking adequate ground-line infrastructure.
A typical WLL multiple-access communication system as known in prior art uses TDMA or FDMA technology. Larger cellular communications systems, wherein participants are highly mobile, commonly use a Code-Division-Multiple-Access (CDMA) technology. CDMA systems use a well-known method known in the art as spread spectrum transmission wherein signal spreading and de-spreading is practiced in order to optimize signal strength. Cellular systems designed with CDMA spread-spectrum technology offer greater operational flexibility and a greater overall system capacity (number of ongoing channels at any given time) than do wireless systems that use FDMA or TDMA access methods.
A typical WLL system has a base station (BS) connected to a telephony switch via telephony trunks that are well known in the art. The BS has the ability of communicating via wireless broadcast and reception with Remote Access Units (RAU) installed within range of the base station, as determined by location, broadcast power, antenna design and so on. The connected telephony switching provides access to a land-based telephone network, such as a Public-Switched Telephone Network (PSTN). Incoming events (telephone calls) are received by the base station from the PSTN and connected with sub terminals via the wireless CDMA system. Client RAU typically consists of a client""s telephone, fax machine, and/or other communication devices that are connected to the Remote Access Unit (RAU), which is the wireless receiver/transmitter device that communicates with a BS.
Outgoing events (calls from the sub terminals) are made from the RAU via the CDMA system to the BS, and then connected over telephony trunks to a connected telephone switch, and then on to their ultimate destinations over the PSTN, or a connected public or private telephone network.
Code division multiple access (CDMA) technology is used mostly by cellular systems wherein devices are mobile. However, a WLL system known to the inventor uses a CDMA method including signal spreading and de-spreading technology. Such a system typically has a better signal recovery signature than those prior art systems using TDMA or FDMA.
An ongoing challenge associated with the practice of a typical WLL system, whether CDMA, FDMA, or TDMA, is the ability to maintain an optimum signal at both a BS and at a RAU. There are many potential challenges to overcome in order to facilitate strong signal transmission and reception between a BS and an RAU. For example, in a line-of-sight (LOS) system wherein a BS and RAU are within line-of-sight of each other, bad weather, significant temperature fluctuation, or a temporary physical obstacle may interfere with a transmitted signal causing it to fade very fast. Prior art WLL systems have a minimum signal-strength threshold (measured at peak) assigned to them and ignore any weak signals that fall below such thresholds. The result is signal fadeout or dropout, causing audible anomaly in an ongoing call.
Another type of WLL system operates in a multi-path environment. This type of system is generally larger (more range) than a LOS system. In a multi-path system, signals travel by varied and multiple paths and arrive at the receiver at different times, strengths, etc. Structure or terrain is generally responsible for an existing multi-path environment in a WLL system. Structure interferes with signal propagation such that many copies of the original signal arrive by various (multiple) paths and not at the same time.
A system known to the inventor and taught in the cross-referenced patent application enables a received spread signal to be continually stripped of data even if it falls below an acceptable strength threshold. While data is utilized from weak received signals, timing is only generated from the strongest received spread signals. In this way, voice/data dropout is minimized. This process works for both single and multi-path applications.
In addition to minimizing voice or data dropout, it is also desired that a faster signal acquisition may be accomplished at a receiving station without incurring added expense of a complicated module and procedure. In prior art systems, an acquisition module is used to acquire initial signal timing for a received signal before the signal is tracked and refined in signal tracking circuitry. An acquisition module functions to compute the values of a synchronization code associated with a received signal to identify a unique base station within a cell, and to acquire an acceptable initial timing for the signal.
In prior art CDMA systems, the acquisition process uses significant circuitry, hardware, and software to perform acquisition function of signal timing. This is due, in part, to a fact that an entire synchronization code sequence must be computed before an acceptable initial timing is established. Also in prior art systems, a verification stage for verifying and initial signal timing for a signal requires an additional set of circuitry.
What is clearly needed is a fast acquisition module that can sectorize a synchronization code sequence and simultaneously compute and verify signal timing using a single set of circuitry. Such a module could be made smaller and more inexpensively as well as provide faster timing initialization and verification when compared with prior art systems.
In a preferred embodiment of the present invention an acquisition module for acquiring signal timing in a CDMA system is provided comprising a register for storing and organizing synchronization code; at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code; at least 4 absolute value blocks for determining absolute values of match filtering results; a summation function for summing results obtained through match filtering and through absolute value taking; and a control logic for controlling the acquisition process, characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing.
In a preferred embodiment both small and large phase error samples are computed using the same control circuitry. Also in this embodiment, match filtering is performed at xc2xd chip intervals. Also in a preferred embodiment, during the initial verification performed on the first 64-bits of code after acquisition, a fine tuning operation is performed by checking for a better peak correlation at xc2xd-chip offset positions over a duration of 1.5 chips.
In another aspect of the invention a method for acquiring signal timing for a CDMA system is provided comprising the steps of a) loading a 64-bit section of synchronization code into an acquisition module; b) receiving 64 bits of I/Q complex samples corresponding to the 64-bit section synchronization code; c) match filtering the synchronization code and the I/Q complex samples simultaneously using at least 4 16-bit match filters; d) comparing match filtering results with a preset threshold; and e) depending upon the comparison, determining whether a received signal timing is acceptable for acquisition and verification.
In a preferred aspect of the above method, in step e), a first comparison of match-filtering results with a preset threshold determines whether or not an initial timing will be acquired, and subsequent comparisons determined whether or not an acquired signal timing will be verified. Also in a preferred aspect, in step (c), both small and large phase error samples are computed using the same control circuitry and match filtering is performed at xc2xd chip intervals.
In another preferred aspect of the above method, in step (c), during the initial verification performed on the first 64-bits of code after acquisition, a fine tuning operation is performed by checking for a better peak correlation at xc2xd-chip offset positions over a duration of 1.5 chips.
In various embodiments taught in enabling detail below, for the first time a fast acquisition module is provided that can sectorize a synchronization code sequence and simultaneously compute and verify signal timing using a single set of circuitry.